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<title>Serial computer</title>

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<span id="openzim-page-title" class="mw-page-title-main"><span class="mw-page-title-main">Serial computer</span></span>

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<p>

A <b>serial computer</b> is a computer typified by <a href="Bit-serial_architecture" title="Bit-serial architecture">bit-serial architecture</a> – i.e., internally operating on one <a href="Bit" title="Bit">bit</a> or <a href="Numerical_digit" title="Numerical digit">digit</a> for each <a href="Clock_signal" title="Clock signal">clock cycle</a>. Machines with serial <a href="Main_storage" class="mw-redirect" title="Main storage">main storage</a> devices such as acoustic or <a href="Magnetostrictive" class="mw-redirect" title="Magnetostrictive">magnetostrictive</a> <a href="Delay-line_memory" title="Delay-line memory">delay lines</a> and <a href="Drum_memory" title="Drum memory">rotating magnetic devices</a> were usually serial computers.

</p><p>Serial computers require much less hardware than their bit-parallel counterparts<sup id="cite_ref-Wilkes_1956_1-0" class="reference"><a href="#cite_note-Wilkes_1956-1"><span class="cite-bracket">[</span>1<span class="cite-bracket">]</span></a></sup> which exploit <a href="Bit-level_parallelism" title="Bit-level parallelism">bit-level parallelism</a> to do more computation per clock cycle. There are modern variants of the serial computer available as a <a href="Soft_microprocessor" title="Soft microprocessor">soft microprocessor</a><sup id="cite_ref-Howe_2019_2-0" class="reference"><a href="#cite_note-Howe_2019-2"><span class="cite-bracket">[</span>2<span class="cite-bracket">]</span></a></sup> which can serve niche purposes where the size of the CPU is the main constraint.

</p><p>The first computer that was not serial and used a <a href="Parallel_bus" class="mw-redirect" title="Parallel bus">parallel bus</a> was the <a href="Whirlwind_I" title="Whirlwind I">Whirlwind</a> in 1951.

</p><p>A serial computer is not necessarily the same as a computer with a <a href="1-bit_architecture" class="mw-redirect" title="1-bit architecture">1-bit architecture</a>, which is a subset of the serial computer class. 1-bit computer instructions operate on data consisting of single bits, whereas a serial computer can operate on <i>N</i>-bit data widths, but does so a single bit at a time.

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<div class="mw-heading mw-heading2"><h2 id="Serial_machines">Serial machines</h2></div>

<ul><li><a href="EDVAC" title="EDVAC">EDVAC</a> (1949)</li>

<li><a href="BINAC" title="BINAC">BINAC</a> (1949)</li>

<li><a href="UNIVAC_I" title="UNIVAC I">UNIVAC I</a> (1951)</li>

<li><a href="Elliott_Brothers_(computer_company)" title="Elliott Brothers (computer company)">Elliott Brothers</a> <a href="Elliott_152" title="Elliott 152">Elliott 152</a> (1954)</li>

<li><a href="Bendix_G-15" title="Bendix G-15">Bendix G-15</a> (1956)</li>

<li><a href="Elliott_Brothers_(computer_company)" title="Elliott Brothers (computer company)">Elliott Brothers</a> <a href="Elliott_803" title="Elliott 803">Elliott 803</a> (1958)</li>

<li><a href="ZEBRA_(computer)" title="ZEBRA (computer)">ZEBRA</a> (1958)</li>

<li><a href="D-17B" title="D-17B">D-17B</a> guidance computer (1962)</li>

<li>General Electric GE-PAC 4040 process control computer</li>

<li><a href="F14_CADC" class="mw-redirect" title="F14 CADC">F14 CADC</a> (1970)  – transferred all data serially, but internally operated on many bits in parallel<sup id="cite_ref-Holt_1971_5-0" class="reference"><a href="#cite_note-Holt_1971-5"><span class="cite-bracket">[</span>5<span class="cite-bracket">]</span></a></sup></li>

<li><a href="Kenbak-1" title="Kenbak-1">Kenbak-1</a> (1971)</li>

<li><a href="Datapoint_2200" title="Datapoint 2200">Datapoint 2200</a> (1971)<sup id="cite_ref-Shirriff_2015_6-0" class="reference"><a href="#cite_note-Shirriff_2015-6"><span class="cite-bracket">[</span>6<span class="cite-bracket">]</span></a></sup></li>

<li>Digit-serial <a href="HP_Saturn" title="HP Saturn">HP Saturn</a>-based calculators<sup id="cite_ref-Smith_2023_8-0" class="reference"><a href="#cite_note-Smith_2023-8"><span class="cite-bracket">[</span>8<span class="cite-bracket">]</span></a></sup> from the <a href="HP-71B" title="HP-71B">HP-71B</a> (1974) to the <a href="HP_50g" class="mw-redirect" title="HP 50g">HP 50g</a> (2006–2015)</li>

<li><a href="National_Semiconductor_SC/MP" title="National Semiconductor SC/MP">National Semiconductor SC/MP</a> (1976)</li>

<li><a href="Ferranti_F100-L" title="Ferranti F100-L">Ferranti F100-L</a> (1977)  – <a href="16-bit_computing" title="16-bit computing">16-bit</a>, but uses a bit-serial <a href="Arithmetic_logic_unit" title="Arithmetic logic unit">arithmetic logic unit</a></li></ul>

<div class="mw-heading mw-heading3"><h3 id="Massively_parallel">Massively parallel</h3></div>

<p>Most of the early <a href="Massively_parallel_(computing)" class="mw-redirect" title="Massively parallel (computing)">massive parallel processing</a> machines were built out of individual serial processors, including:

</p>

<ul><li><a href="ICL_Distributed_Array_Processor" title="ICL Distributed Array Processor">ICL Distributed Array Processor</a> (1979)</li>

<li><a href="Goodyear_MPP" title="Goodyear MPP">Goodyear MPP</a> (1983)</li>

<li><a href="Connection_Machine" title="Connection Machine">Connection Machine</a> CM-1 (1985)</li>

<li>Connection Machine CM-2 (1987)</li>

<li><a href="MasPar" title="MasPar">MasPar</a> MP-1 (1990)  – 32-bit architecture, internally processed 4 bits at a time<sup id="cite_ref-Culver_2014_9-0" class="reference"><a href="#cite_note-Culver_2014-9"><span class="cite-bracket">[</span>9<span class="cite-bracket">]</span></a></sup></li>

<li>VIRAM1 <a href="Computational_RAM" title="Computational RAM">computational RAM</a> (2003)</li></ul>

<ul><li><a href="1-bit_computing" title="1-bit computing">1-bit computing</a></li>

<li><a href="BKM_algorithm" title="BKM algorithm">BKM algorithm</a></li>

<li><a href="CORDIC_algorithm" class="mw-redirect" title="CORDIC algorithm">CORDIC algorithm</a></li></ul>

<div class="mw-heading mw-heading2"><h2 id="References">References</h2></div>

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</style><cite id="CITEREFWilkes1956" class="citation book cs1"><a href="Maurice_Vincent_Wilkes" class="mw-redirect" title="Maurice Vincent Wilkes">Wilkes, Maurice Vincent</a> (1956). <a rel="nofollow" class="external text" href="https://books.google.com/books?id=1vUrAAAAIAAJ"><i>Automatic digital computers</i></a>. <a href="Methuen_Publishing_Ltd" class="mw-redirect" title="Methuen Publishing Ltd">Methuen Publishing Ltd</a> / <a href="John_Wiley_%26_Sons%2C_Inc." class="mw-redirect" title="John Wiley & Sons, Inc.">John Wiley & Sons, Inc.</a><span class="reference-accessdate"> Retrieved <span class="nowrap">2012-06-06</span></span>.</cite></span>

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<li id="cite_note-Howe_2019-2"><span class="mw-cite-backlink"><b><a href="#cite_ref-Howe_2019_2-0">^</a></b></span> <span class="reference-text"><cite id="CITEREFHowe2020" class="citation web cs1">Howe, Richard James (2020) [2019-06-27]. <a rel="nofollow" class="external text" href="https://github.com/howerj/bit-serial">"Bit-Serial: A bit-serial CPU written in VHDL, with a simulator written in C."</a> <i>Github Project: A Bit Serial CPU</i>. <a rel="nofollow" class="external text" href="https://web.archive.org/web/20220615231144/https://github.com/howerj/bit-serial">Archived</a> from the original on 2022-06-15<span class="reference-accessdate">. Retrieved <span class="nowrap">2019-06-28</span></span>.</cite></span>

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<li id="cite_note-Miller_1966-3"><span class="mw-cite-backlink"><b><a href="#cite_ref-Miller_1966_3-0">^</a></b></span> <span class="reference-text"><cite id="CITEREFMiller1965" class="citation book cs1">Miller, Raymond E. (1965). <i>Switching Theory – Volume 1: Combinational Circuits</i>. Vol. 1 (Second printing, March 1966, of 1st ed.). <a href="John_Wiley_%26_Sons%2C_Inc." class="mw-redirect" title="John Wiley & Sons, Inc.">John Wiley & Sons, Inc.</a> pp. <span class="nowrap">44–</span>47. <a href="LCCN_(identifier)" class="mw-redirect" title="LCCN (identifier)">LCCN</a> <a rel="nofollow" class="external text" href="https://lccn.loc.gov/65-14249">65-14249</a>.</cite></span>

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<li id="cite_note-DEC_1978-4"><span class="mw-cite-backlink"><b><a href="#cite_ref-DEC_1978_4-0">^</a></b></span> <span class="reference-text"><cite class="citation book cs1"><a rel="nofollow" class="external text" href="http://www.bitsavers.org/pdf/dec/_Books/DEC_1957_To_The_Present_1978.pdf"><i>Nineteen Fifty-Seven to the Present</i></a> <span class="cs1-format">(PDF)</span> (6 ed.). Maynard, Massachusetts, USA: <a href="Digital_Equipment_Corporation" title="Digital Equipment Corporation">Digital Equipment Corporation</a>. 1978 [1972]. p. 7. <a rel="nofollow" class="external text" href="https://web.archive.org/web/20220302210148/http://bitsavers.org/pdf/dec/_Books/DEC_1957_To_The_Present_1978.pdf">Archived</a> <span class="cs1-format">(PDF)</span> from the original on 2022-03-02<span class="reference-accessdate">. Retrieved <span class="nowrap">2021-02-06</span></span>.</cite> (1+viii+87+3 pages)</span>

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<li id="cite_note-Holt_1971-5"><span class="mw-cite-backlink"><b><a href="#cite_ref-Holt_1971_5-0">^</a></b></span> <span class="reference-text"><cite id="CITEREFHolt1971" class="citation book cs1"><a href="Raymond_M._Holt" class="mw-redirect" title="Raymond M. Holt">Holt, Raymond M.</a> (1971). <a rel="nofollow" class="external text" href="https://web.archive.org/web/20171104082502/http://firstmicroprocessor.com/documents/ap1-26-97.pdf"><i>This paper describes the architecture of the CPU and Memory for the Central Air Data Computer (CADC) System used in the Grumman/Navy F14A carrier-based fighter aircraft</i></a> <span class="cs1-format">(PDF)</span>. pp. 5, 7. AP1-26-97. Archived from <a rel="nofollow" class="external text" href="http://firstmicroprocessor.com/documents/ap1-26-97.pdf">the original</a> <span class="cs1-format">(PDF)</span> on 2017-11-04<span class="reference-accessdate">. Retrieved <span class="nowrap">2017-11-04</span></span>. <q>[…] the processor was designed to transfer data serially throughout the entire system. […] The Parallel Multiplier Unit […] by means of a parallel algorithm […]</q></cite> (26 pages)</span>

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<li id="cite_note-Shirriff_2015-6"><span class="mw-cite-backlink"><b><a href="#cite_ref-Shirriff_2015_6-0">^</a></b></span> <span class="reference-text"><cite id="CITEREFShirriff2015" class="citation web cs1">Shirriff, Ken (May 2015). <a rel="nofollow" class="external text" href="https://www.righto.com/2015/05/the-texas-instruments-tmx-1795-first.html">"The Texas Instruments TMX 1795: the (almost) first, forgotten microprocessor"</a>. <a rel="nofollow" class="external text" href="https://web.archive.org/web/20220615173952/https://www.righto.com/2015/05/the-texas-instruments-tmx-1795-first.html">Archived</a> from the original on 2022-06-15<span class="reference-accessdate">. Retrieved <span class="nowrap">2020-05-29</span></span>. <q>Even operating one bit at a time as a serial computer, the Datapoint 2200 performed considerably faster than the 8008 chip...</q></cite></span>

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<li id="cite_note-Stone_1975-7"><span class="mw-cite-backlink"><b><a href="#cite_ref-Stone_1975_7-0">^</a></b></span> <span class="reference-text"><cite id="CITEREFWhitney1975" class="citation book cs1"><a href="Thomas_Whitney_(computing)" title="Thomas Whitney (computing)">Whitney, Thomas M.</a> (1975). <a rel="nofollow" class="external text" href="https://archive.org/details/introductiontoco00ston/page/123/mode/2up?view=theater">"Part I. Basic Computer Architecture. / Chapter 3. Introduction to Calculators: / 3-5. Example Systems / The Hewlett Packard HP-35"</a>. In <a href="Harold_Stuart_Stone" class="mw-redirect" title="Harold Stuart Stone">Stone, Harold Stuart</a> (ed.). <i>Introduction to Computer Architecture</i>. Computer Sciences Series (1 ed.). <a href="Science_Research_Associates%2C_Inc." class="mw-redirect" title="Science Research Associates, Inc.">Science Research Associates, Inc.</a> (SRA). pp. 118–135 [123–135]. <a href="ISBN_(identifier)" class="mw-redirect" title="ISBN (identifier)">ISBN</a> <bdi>0-574-18405-8</bdi>. <a href="LCCN_(identifier)" class="mw-redirect" title="LCCN (identifier)">LCCN</a> <a rel="nofollow" class="external text" href="https://lccn.loc.gov/75-14016">75-14016</a>. ark:/13960/t8pc40t3q. Order-Code 13-4005<span class="reference-accessdate">. Retrieved <span class="nowrap">2023-09-29</span></span>. p. 124: <q>[…] The <a href="HP-35" title="HP-35">HP-35</a> is a totally serial computer. The adder is a <a href="Binary-coded_decimal" title="Binary-coded decimal">BCD</a> serial type […] The serial structure means less integrated circuit area must be allocated to interconnection lines and gating functions and an interesting trade off occurs. A bit-serial, digit-serial architecture is inherently one fourth the speed of a bit-parallel digit-serial structure […] But the basic clock rate for a bit-serial structure can sometimes be increased since additional area can be allocated for larger integrated devices that are necessary for greater speed. In the HP-35, the execution time of the most complex functions is under one second, while the serial architecture permits an increased circuit complexity. […] Instructions in the HP-35 are transferred serially from the active read-only memory to the arithmetic and control circuits and to other ROMs if present. […]</q></cite></span>

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<li id="cite_note-Smith_2023-8"><span class="mw-cite-backlink"><b><a href="#cite_ref-Smith_2023_8-0">^</a></b></span> <span class="reference-text"><cite id="CITEREFSmith2023" class="citation web cs1">Smith, Eric L. "Brouhaha" (2023-08-09). <a rel="nofollow" class="external text" href="https://www.hpmuseum.org/forum/thread-20281.html">"HP-15C CE woes: 1 bug, 2 limitations, 3 questions"</a>. <i>MoHPC - The Museum of HP Calculators</i>. <a rel="nofollow" class="external text" href="https://web.archive.org/web/20230810144726/https://www.hpmuseum.org/forum/thread-20281.html">Archived</a> from the original on 2023-08-10<span class="reference-accessdate">. Retrieved <span class="nowrap">2023-09-24</span></span>.</cite></span>

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<li id="cite_note-Culver_2014-9"><span class="mw-cite-backlink"><b><a href="#cite_ref-Culver_2014_9-0">^</a></b></span> <span class="reference-text"><cite id="CITEREFCulver2014" class="citation web cs1">Culver, John (2014-09-05). <a rel="nofollow" class="external text" href="http://www.cpushack.com/2014/09/05/maspar-massively-parallel-computers-32-cores-on-a-chip/">"MasPar: Massively Parallel Computers – 32 cores on a chip"</a>. <a rel="nofollow" class="external text" href="https://web.archive.org/web/20220615173816/https://www.cpushack.com/2014/09/05/maspar-massively-parallel-computers-32-cores-on-a-chip/">Archived</a> from the original on 2022-06-15<span class="reference-accessdate">. Retrieved <span class="nowrap">2022-06-15</span></span>.</cite></span>

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<div class="mw-heading mw-heading2"><h2 id="Further_reading">Further reading</h2></div>

<ul><li><cite id="CITEREFHartleyParhi1995" class="citation book cs1"><a href="Richard_I._Hartley" class="mw-redirect" title="Richard I. Hartley">Hartley, Richard I.</a>; Parhi, Keshab K. (1995). <i>Digit-Serial Computation</i>. The Kluwer International Series in Engineering and Computer Science (1 ed.). Norwell, Massachusetts, USA: <a href="Kluwer_Academic_Publishers" class="mw-redirect" title="Kluwer Academic Publishers">Kluwer Academic Publishers</a>. <a href="ISBN_(identifier)" class="mw-redirect" title="ISBN (identifier)">ISBN</a> <bdi>0-7923-9573-5</bdi>. SECS316.</cite> (xiv+306 pages)</li>

<li><cite id="CITEREFParhi1991" class="citation journal cs1">Parhi, Keshab K. (April 1991). "A Systematic Approach for Design of Digit-Serial Signal Processing Architectures". <i><a href="IEEE_Transactions_on_Circuits_and_Systems" class="mw-redirect" title="IEEE Transactions on Circuits and Systems">IEEE Transactions on Circuits and Systems</a></i>. <b>38</b> (4): <span class="nowrap">358–</span>375. <a href="Doi_(identifier)" class="mw-redirect" title="Doi (identifier)">doi</a>:<a rel="nofollow" class="external text" href="https://doi.org/10.1109%2F31.75394">10.1109/31.75394</a>.</cite> (8 pages)</li></ul></div><div><div class="zim-footer">

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